![]() The “if” statements of VHDL are similar to the conditional structures utilized in computer programming languages. Sequential VHDL allows us to easily describe both sequential circuits and combinational ones. Such a circuit is sequential because its output depends on both the input clock and the current value of the counter. We’ll observe the sequence 000, 001, 010, …, 111 at the counter output. Assume that with each rising edge of the clock, the output of the counter increases by one. For example, consider a three-bit counter with a clock input. The output of a sequential circuit depends on both the circuit inputs and its internal states. These statements can be used to describe both sequential circuits and combinational ones.Ī sequential circuit is one that uses memory elements, such as registers, to store data as the internal state of the circuit. Sequential VHDL is the part of the code that is executed line by line. It’s important to note that sequential VHDL is not necessarily used to describe a sequential circuit. ![]() Sequential Circuits vs Sequential Statements ![]() If you'd like to review more basic concepts before continuing, please check out my article on the basics of VHDL. The previous article on sequential statements in VHDL, this series explained that sequential statements allow us to describe a digital system in a more intuitive way. This article will review two important sequential statements, namely “if” and “case” statements.
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